Current mirrors/sources
Current mirrors/sources • Reproduce specific current value in different parts of a circuit. Initially assume that: – The transistors output impedance ro . – Identical Transistors, IC1 = IC2 as Vbe1 = Vbe2. • As IC1 = IC2 • Summing currents at collector of Q1. I ref I C1 This is easier on ICs due to transistors being on the same substrate. Match around 1%. 2 I C1 0 2 I C1 1 I ref • Remember IC1 = IC2 IC 2 Op Amp ©2013 J Everard, University of York 152 How to change current ratio in Q1 and Q2 • • • • Vary the transistor emitter area and hence Is. Typical ratios up to ~ 5 There are other methods to be described later. The output impedance of the current source can be very important if the collector voltage on Q2 varies. Look at Early voltage. ©2013 J Everard, University of York 154 I ref For large 2 1 I C 2 I ref VCC Vbe R ©2013 J Everard, University of York 153 Simple current mirror with gain • Add Q3 to reduce the effect of base currents in Q1, Q2 etc ©2013 J Everard, University of York 155 Ignoring O/P impedance of Q2 • As IC1 = IC2 I E3 ib 3 I C1 F IC 2 F 2 Use emitter degeneration to: IC 2 • Increase O/P resistance. Remember that for common emitter amp with external RE: F I E3 IC 2 2 3 1 F 3 1 As I ref I C1 ib 3 As I C 2 I C1 2 F Ro ro 1 g m RE IC 2 3 1 I C 2 1 IC 2 I ref 2 F 3 1 Let VRE 250mV I ref 1 F 3 1 2 ©2013 J Everard, University of York 156 Remember that: I E1 RE1 Vbe1 I E 4 RE 4 Vbe 4 I Vbe1 VT ln E1 I S1 RE Then R0 r0 11 ©2013 J Everard, University of York 157 I E1 I I E 4 R4 VT ln E 4 I S1 IS4 1 I I I E1 R1 VT ln E1 S 4 R4 I S1 I E 4 Take example : Let I C 4 2 I C1 2 I ref • Note that I E 4 I S 4 exp R4 IE4 – In this case also scale RE to keep VRE constant. – Take base to ground voltages then: Vbe1 VT R1 I E1 R1 VT ln • We can scale the emitter area to scale currents. I E1 I S1 exp R I mA R Ro ro 1 E ro 1 E E 25 mV re V ro 1 RE 25mV Make I S 4 2 I S 1 and R1 2 R4 Vbe 4 VT IC 4 I Vbe 4 VT ln E 4 IS4 ©2013 J Everard, University of York 158 R1 I ref 2 I ref R4 ©2013 J Everard, University of York 159 Suppose emitter scaling not very accurate • Suppose very low current sources are required and the resistor values need to be kept low. Use emitter resistor in one arm. IS4 2 I S1 • Hence • Then ‘ln’ term in equation is not zero however ‘ln’ term varies slowly. ln 1 0 ln 0.5 0.6 ln 2 0.6 I E1 R1 VT • If we ensure that then: IC 4 R1 I ref R4 Vbe1 Vbe 2 I E 2 R2 VT ln I E1 IE2 I Ignoring base currents I C 2 R2 VT ln E1 IE2 160 ©2013 J Everard, University of York 161 CASCODE current source EOL • Remember for simple Cascode the output impedance is increased to: Ro = ro. • Let VCC = 30V and R1 = 29.3k. • Calculate R2 to obtain IC2 = 10A Ignoring base currents V 0 .7 I C1 CC 1mA 29.3k VT ln I E1 I VT ln E 2 I E 2 R2 IS2 I S1 Assume I S 1 I S 2 then I E 2 R2 VT ln ©2013 J Everard, University of York Example Widlar current source 1mA I C1 115mV 25mV ln IC 2 10 A I E 2 R2 115mV If we include the effect of Q1 and Q3 then Ro = (ro)/2 Basic Current Source R2 11.5k ©2013 J Everard, University of York 162 ©2013 J Everard, University of York 163 • As Q1and Q3 are the same: WILSON Current mirror 2 I E 2 I C 3 1 • High Output impedance • Good current match • Uses negative feedback • Collector current of Q2=IC2 2 I C 3 1 I C 2 I E 2 1 1 – For this calculation of IC2 assume that VA . IC3 • Q2 emitter current is: I E 2 I C 3 ib 3 ib1 1 I I E 2 I C 3 1 C1 As I C1 I ref ©2013 J Everard, University of York 164 and I C1 I C 3 It can be shown that : 2 I C2 I ref 1 - 2 2 2 r Note also Ro o 2 2 From Gray and Meyers ©2013 J Everard, University of York 165 Active Loads (continued) • Notes on resistive loads. • To obtain high voltage gain use active load to produce near horizontal load line without large resistor. – To obtain high voltage gain require large gmRL. RL I C RL re VT IC 2 Eol_11_wk_9_4_Dec_2012 Active Loads g m RL 1 IC 2 2 1 1 Small error Needs to be large Active load Active load I/V characteristic • Therefore need large RL and large PSU. – For example suppose we require a voltage gain of 500. As VT = 25mV, ICRL = 12.5Volts. In fact you would need an even larger supply voltage to avoid saturation (say twice!). – Let IC = 100mA then RL would be 130k which is very large and takes a large area. ©2013 J Everard, University of York 166 Biasing is critical to obtain correct operating point©2013 J Everard, University of York 167 Small signal gain (Active Load) Av g m ro1 // ro 2 g m1 1 1 ro1 ro 2 • Remember that: 1 V ro where T gm VA • Find the voltage gain (AV) when: g m1 Av npn g m1 pnp gm2 Early Voltage Early Factor • As collector currents the same gm1 = gm2 Av 1 npn (and Inverse sum of two Early Factors) ©2013 J Everard, University of York pnp 5.10 4 npn 2.10 4 Early voltage 50V Early voltage 125V Av Note Independent of current pnp Example V T VA 168 1 1428 5.10 4 2.10 4 The voltage gain is only dependent on the transistor parameters. Why should one use higher currents? ©2013 J Everard, University of York 169 Improved difference amplifier with active load Emitter coupled pair (difference amplifier) with active load Much better rejection of common mode I/P for single O/P than standard circuit. Problems with current match in current sources ©2013 J Everard, University of York 170 Op amp ©2013 J Everard, University of York 171 Emitter coupled Differential Amplifier with Active Load • Important features: – – – – Gain Output impedance Offset voltage Analysis of gain, output impedance & offset are shown in Appendix 1 Analysis of Gain, O/P impedance & offset voltage are shown in appendix 1. Equivalent circuit shown here: Use Hybrid Transistor Model with: rb = 0 (Base spreading resistance). REE Current source impedance). r (Feedback resistance) Short I/P to ground for this analysis re3 3 2 • The equivalent circuit is shown on the next slide 1 Node numbers ©2013 J Everard, University of York 172 1 npn g m ro pnp // ronpn pnp 173 Require output impedance Voltage Gain V0 Vi ©2013 J Everard, University of York • As with calculation of Ro for common emitter amplifier with external RE Short I/P to ground for this analysis – Apply voltage source at O/P and calculate current. (NB short out voltage sources) Short I/P to ground for this analysis See O/P impedance of emitter follower Output impedances in parallel ©2013 J Everard, University of York 174 ©2013 J Everard, University of York 175 Take example (as before) Voltage Gain Output impedance • IEE = 100A Short I/P to ground for this analysis V 1 Total Rout Ro x ronpn // ro pnp 1 1 ix ronpn ro pnp O/P resistances in parallel ©2013 J Everard, University of York O/P impedance Ro ronpn // ro pnp ronpn 1 npn g m ro pnp 1 pnp gm 1 V 2.5M A A 50 I mV 25 2.10 4 V 1 1M A I 50 A 25mV 5.10 4 Ro 2.5M // 1M 714k ro VT 1 VT I gm Eol_12_wk9_6_12_2012 NB: O/P impedance is set only by the transistor parameters and the current! ©2013 J Everard, University of York Early voltage 50V npn 2.10 4 Early voltage 125V pnp Av 1 npn 1428 pnp NB: The voltage gain is set only by the Transistor parameters! 176 Remember that : V ro A I V T VA VA 5.10 4 178 ©2013 J Everard, University of York 177 Output Stages • These are required to provide: – Low output impedance – capability for driving specified load with • correct bandwidth • correct slew rate • specified output swing – Low distortion – meet specification for power dissipation ©2013 J Everard, University of York 179 Examine large signal behaviour Take example Q2 is the current source Q1 is the emitter follower Diode partly matches drift in Q2 • Emitter Follower With a Current Source – Examine both a large and small signal model: Vin Vbe1 Vout As I E1 I S exp Vbe1 VT ln Vbe1 VT I E1 IS As I E1 I Q Vout RL Current source ©2013 J Everard, University of York V I Q out RL Vin VT ln IS V out 180 V I Q out RL Vout Vin VT ln IS ©2013 J Everard, University of York 181 Similar circuit with output capacitor • This removes the offset voltage on the output and removes DC current flowing into the load. • However the causes of saturation are very similar Negative swing limited by Value of current source ©2013 J Everard, University of York 182 ©2013 J Everard, University of York 183 Small signal behaviour of emitter follower Input impedance of Emitter Follower Work out input impedance • Look at output impedance – with finite and zero source impedance VX 1ib re RL • Look at input impedance when driving load RL I X ib VX 1re RL IX Also try with model ©2013 J Everard, University of York 184 O/P impedance of emitter follower also mentioned earlier in the course Also try with model VX 1ib re ib RS I X 1ib • Need to use a full model, not half mode model as not symmetrical • Try T model – Can also use pi model RS VX 1ib re ib RS re 1ib 1 IX ©2013 J Everard, University of York 185 Comments on differential Amplifier with single ended I/P and O/P Work out output impedance IGNORE LOAD RESISTANCE short circuit ©2013 J Everard, University of York +15V CD1 0.1µF R4 C1 Q1 C2 Q2 BC182 BC182 v 1 R1 10k 10k R2 v v0 2 0V R3 -15V 186 ©2013 J Everard, University of York 187 • T Model for diff amp with single ended I/P & O/P described in class Appendix 1 Full analysis Emitter coupled Differential Amplifier with Active Load ©2013 J Everard, University of York 188 Appendix 1 Emitter coupled Differential Amplifier with Active Load ©2013 J Everard, University of York 189 Use Hybrid Transistor Model with: rb = 0 (Base spreading resistance). REE Current source impedance). r (Feedback resistance) • Important features – Gain – Output impedance – Offset voltage re3 3 2 1 Node numbers ©2013 J Everard, University of York 190 ©2013 J Everard, University of York 191 • Summing currents at node 1 : • Summing currents at node 2 : ro1 current Vi V1 1 V2 V1 V3 V1 V1 1 0 r 1 ro1 ro2 r 2 Q1 base current + current source Q2 base current + current source Re-arranging A V1 1 1 1 1 V2 r 1 r 2 ro1 ro2 ro1 Re‐arranging V3 V 1 ro2 r 1 Note that the impedance presented by Q3 is the parallel combination of ro3, r3, 1/gm3, r4. In fact re3 = (1/gm3 // r3) (1/gm3) which is the dominant (smallest) term ©2013 J Everard, University of York B V1 1 gm1 ro1 V3 V V V2 gm4 3 1 gm2V1 0 ro4 ro2 ©2013 J Everard, University of York 193 – as currents the same. 1 • Assume that: g m ro A becomes 1 1 1 V2 gm4 V3 0 V1 gm2 ro2 ro4 ro2 ©2013 J Everard, University of York gmV i • Use B and C to eliminate V1 and V2 from A. • Assume that gm1=gm2=gm3=gm4 Re‐arranging C V2 1 1 ro1 1 gm3 192 • Summing currents at node 3 : V2 V2 V1 Vi V1 gm1 0 1 ro1 gm3 V0 Vi 194 V3 1 npn gmVi 1 1 ronpn ro pnp Vo g m ro pnp // ronpn pnp ©2013 J Everard, University of York 195 Require output impedance • As with calculation of Ro for common emitter amplifier with external RE – Apply voltage source at O/P and calculate current. (NB short out voltage sources) See O/P impedance of emitter follower ©2013 J Everard, University of York • Total current is: 196 Same current, same gm V ix 2 ix 4 x 2ro2 • Note this current passes into emitter of Q1 and through Q3 and Q4 with unity gain: V ix 3 ix 2 ix 4 x 2ro2 ©2013 J Everard, University of York ix ix1 ix 2 ix 3 ix 4 • IEE = 100A Vx 1 ronpn // ro pnp 1 1 ix ronpn ro pnp O/P resistances in parallel ©2013 J Everard, University of York 197 Take example as before Voltage Gain 1 1 ix Vx ro ro 2 4 Total Rout Ro • Current in ro4 is: ix1 Vx ro 4 • Resistance presented to emitter of Q2 = emitter resistance of Q1 = 1 1 2ro2 Ro2 ro2 1 gm2 . re1 gm1 gm 1 198 pnp 5.10 4 npn 2.10 4 Av Early voltage 50V Early voltage 125V 1 npn 1428 pnp ©2013 J Everard, University of York 199 O/P impedance Ro ronpn // ro pnp ronpn 1 npn gm 1 V 2 .5 M A I 50 A 25mV 2.10 4 Remember that : V ro A I V T VA VA ro ro pnp 1 pnp gm V 1 1M A I 50 A 25mV VT 1 VT I gm 5.10 4 Ro 2.5M // 1M 714k ©2013 J Everard, University of York 200 Offset voltages ©2013 J Everard, University of York 201 Offset voltages • Look at offset for differential amp with active load. • The offset voltage is the voltage we need to apply to the input to obtain zero volts at the output. • In this case that is when VCE3 = VCE4 and VCE1 = VCE2 • Offset voltages in active load emitter coupled circuits result from: – Mismatches in Is of I/P transistors and load devices – Base currents in the load devices ©2013 J Everard, University of York 202 ©2013 J Everard, University of York 203 I C1 I C 3 Base currents Offset voltages calculation • We therefore want to derive an equation for the offset voltage, VOS, in terms of , Is1, Is2, Is3, Is4 and the base currents. I I C 4 I C 3 S 4 • Collector current in Q4 = IS3 • Note as IC2=‐IC4 IS4 I C 2 I C 3 IS3 2 I C1 I C 3 1 (B) • The I/P offset voltage is: • VOS=VBE1‐VBE2 I C I S exp VBE VT I VBE VT ln C IS I I VOS VT ln C1 . S 2 I C 2 I S1 ( A) ©2013 J Everard, University of York Remember that : 204 ©2013 J Everard, University of York (C) 205 Algebra Page • Substitute A and B in C. 2 I C 3 1 I VOS VT ln S 2 . I S 1 I C 3 I S 4 I S3 NB This image cannot currently be display ed. X X 1 X 2 X from 1 X 1 X 2 X I I 2 VOS VT ln S 2 . S 3 1 I S1 I S 4 This image cannot currently be display ed. X 1 2 X X 1 X X X1 X 2 206 X1 X 2 average 2 2 from (2) 2X X1 X 2 X 2 2X X1 2 X 1 2 X X Simplify this expression for small purturbations ©2013 J Everard, University of York X1 X perturbation can be represented as X2 X perturbation Let difference 1 X1 2X X 2 X2 X X 2 ©2013 J Everard, University of York. 207 Algebra page X A ln X For 1 2 X X 2 ln X X 2 1 ln 1 X 2X X 2X X 1 and using Binomial expansion 2X Small change for IS of pnp X X Ignore IS3 IS4 2 For X<<X ©2013 J Everard, University of York 208 Take Example I S • Let vary by up to + 5% worse case. IS • And = 20. VOS VT 0.05 0.05 0.1 0.2 VT 5mV ©2013 J Everard, University of York Small change for IS of npn I I 2 VOS VT SP SN I SN I SP X X 2 X X X A ln1 ln1 1 X 4 X 2 X 2 X 2 X X ln 1 X2 I I 2 As VOS VT ln S 2 . S 3 1 I S1 I S 4 For small perturbations Divide top and bottom by X 210 pnp npn I S 2 I S1 2 ©2013 J Everard, University of York 209
© Copyright 2025