1. No category

IMPROVING THE MRF
BASELINE
rok.stefanic@cosylab.com
Prague, June 5th 2014
Introduction
 Motivation for the presence
 Cosylab timing projects
 Cosylab wishes for MRF future
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About Cosylab
 we are now 85 and part of big projects
ITER, ESS, MedAustron, Solaris, FAIR….
 we like to do things efficiently and standardize solutions which
we believe is the most efficient for community

 my personal interest is timing-system standardization
 and besides above there are many emerging; RISP, MYRRHA,
BNCT where timing system shall be crucial part
 we believe MRF is a very solid platform for timing system solutions
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Timing projects
 ESS
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after analyzing ESS needs we believe MRF FW upgrades are needed
we started with MRF “branch”, now we discussed with Timo to address this
 MedAustron
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highly customized, medical-suited FW upgrade of MRF
extended MRF to provide virtual accelerator service
4PY put into real-time application layer for medical ramping-synchrotron accelerator
together with Jukka made PXIe EVR
 RISP/RAON

compare MRF “off the shelf” and WR

we really appreciate MRF platform we can buy from Jukka
 FAIR
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it is WR, we are following this community and we understand situation
 Solaris
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MRF off the shelf + Tango
 MYRRHA

MRF off the shelf + mrfioc2
MedAustron REDNET
1x MRF EVG
 REDNET = real-time event
and data network
 requirement analysis,
 architecture design
 development (LV + FPGA),
testing…
 effort: ~4 MY
n-x MRF EVR
ESS timing system
 implementation using standardized EPICS Nominal Device Support
 additions to MRF FW with fallback sequences, data emission coupled
with sequences, “MPS” PoC
 effort: ~1.5 MY
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RISP / RAON
Requirements
Compare MRF & WR
Architecture
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Cosylab wishes for MRF future
 data buffer emission done in RT (HW) and synchronized with
sequencer(s)
 sequencer gating in different modes (direct termination, graceful
termination)

low level RT coupling with MPS
 automatic propagation delay compensation
 user trigger events with additional conditions for emission

trigger timing event, delay, number of repetitions, decimation
 easier/standardized setup of the system - everyone needs to know the
TS very well before "Hello World" can be made

Abstraction layer – integrator should deal with his needs not direct HW
configuration
 more complete SW support (additions to mrfioc2)